As more circuits and functions are integrated into a single chip, a chip often has more power pins to supply sufficient current for circuit operations. For different applications, the voltage levels in the circuits are different. As a result, in one integrated circuit there maybe different groups of power supplies with different voltage levels. Such integrated circuits, with different power supplies'voltage levels, have been called the mixed-voltage integrated circuits.
Due to the voltage levels'difference, the power lines and power pins in the integrated circuits have to be independently separated to avoid noise coupling between “dirty” and “clean” buses. However, a situation of electrostatic discharge may happen between any two circuits'pins, i.e., the electrostatic discharge current may flow into the circuits from one input or output pin and then flow out of the circuits form the other pin. Therefore, the separate mixed-voltage power system would induce ESD weakness.
For example, as shown in FIG. 1, one input/output power resource 100 is separate from one internal circuit 110. More specifically, each grounded pad of the I/O power 100 and the internal circuit 110, Vsso and Vssi , are separate by a resistance Rsub. Suppose one ESD pulse is applied to a pin 120 with respect to the ground pad Vssi, the ESD current may be discharged through the path 1, originally designed for ESD current. However, sometimes R sub may be large enough to introduce a large IR voltage drop, and thus results in a large voltage difference between the pin 120 and Vssi. If the voltage difference is so large that the unexpected path 2 is initiated to discharge the ESD current instead of the path 1, some internal device will be overstressed and then damaged.
On the other hand, as shown in FIG. 2, if an ESD device 130 exists to connect the I/O power supply, Vcco, with the internal circuits, Vcci, the ESD current can be discharged easily through the parasitic diode D1 and ESD device 130 to Vcci, then to trigger the ESD power clamp 140 between Vcci and Vssi, as the path 3 in FIG. 2. In this case, if an ESD device 150 is arranged to connect Vsso and Vssi, it will be more beneficial through the path 4 to discharge the ESD current from pad 120 to Vssi. The internal circuit would not suffer overstress and can be protected sufficiently. Thus, the ESD devices between the separate power supplies are very important to protect the internal circuits.
In the prior art, back-to-back or diode-connected devices are used to serve as ESD devices, as shown in FIGS. 3A and 3B respectively. The number of back-to-back or diode-connected devices depend on the following factors: (1) the requirement of noise immunity, or (2) the voltage difference between Vcc1 and Vcc2. For case (1), if the nominal Vcc1 supply voltage is the same as Vcc2, but the Vcc1 is expected to be noisier than Vcc2, then the diode number in the direction of Vcc1 to Vcc2 can be increased to enhance the noise immunity. However, the increased diode number would degrade the ESD device's protection efficiency. For case (2), if the Vcc1 supply voltage is larger than Vcc2, the voltage drop of the diode string in the direction of Vcc1 to Vcc2 has to be larger than the voltage difference. For example, at least 4 diodes will be needed to compensate for the supply voltage's difference of between 5V and 3.3V.
Utilizing a plurality of diodes to avoid the noise coupling between power supplies with different voltage levels would result in the protection efficiency degradation of ESD devices. Therefore, there is a need to improve the design of ESD devices.